Basic Logic Element (BLE)

BLE - Architecture

basic

As shown to the right, a typical BLE consists of: K-input LUT D-type flip-flop (DFF) 2-input Multiplexer (MUX) The output can be either synchronous or asynchronous, depending on the programming of the mux to the right.

advanced

As shown on the right, a typical logic cell consists of: 4-input LUT full adder (FA) D-type flip-flop (DFF) The LUTs are in this figure split into two 3-input LUTs. In normal mode, those are combined into a 4-input LUT through the left mux In arithmetic mode, their outputs are fed to the FA The selection of mode is programmed into the middle multiplexer. The output can be either synchronous or asynchronous, depending on the programming of the mux to the right. In practice, entire or parts of the FA are put as functions into the LUTs in order to save space

BLE - Use Cases

• used in Configurable Logic Block (CLB) - Logic Array Block (LAB)